Port B Data Direction Register (Pbddr); Port B Data Register (Pbdr) - Hitachi H8/3032 Series Hardware Manual

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9.2.3 Port B Data Direction Register (PBDDR)

PBDDR is an 8-bit write-only register that selects input or output for each pin in port B.
Bit
Initial value
Read/Write
Port B is multiplexed with pins TP
be set to 1. For further information about PBDDR, see section 7.11, Port B.

9.2.4 Port B Data Register (PBDR)

PBDR is an 8-bit readable/writable register that stores TPC output data for groups 2 and 3, when
these TPC output groups are used.
Bit
Initial value
Read/Write
Note:
For further information about PBDR, see section 7.11, Port B.
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7
6
PB DDR
PB DDR
PB DDR
7
6
0
0
W
W
to TP
15
7
6
PB
PB
7
6
0
0
R/(W)
*
R/(W)
*
R/(W)
*
Bits selected for TPC output by NDERB settings become read-only bits.
5
4
3
PB DDR
PB DDR
PB DDR
5
4
3
2
0
0
0
W
W
W
W
Port B data direction 7 to 0
These bits select input or
output for port B pins
. Bits corresponding to pins used for TPC output must
8
5
4
3
PB
PB
PB
PB
5
4
3
0
0
0
*
R/(W)
*
R/(W)
*
R/(W)
Port B data 7 to 0
These bits store output data
for TPC output groups 2 and 3
274
2
1
0
PB DDR
PB DDR
1
0
0
0
0
W
W
2
1
0
PB
PB
2
1
0
0
0
0
*
R/(W)
*
R/(W)
*

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