Timer Counters (Tcnt) - Hitachi H8/3032 Series Hardware Manual

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Bits 3 and 2—Reserved: Read-only bits, always read as 1.
Bit 1—Output Level Select 4 (OLS4): Selects output levels in complementary PWM mode and
reset-synchronized PWM mode.
Bit 1
OLS4 Description
0 TIOCA3, TIOCA4, and TIOCB4 outputs are inverted
1 TIOCA3, TIOCA4, and TIOCB4 outputs are not inverted
Bit 0—Output Level Select 3 (OLS3): Selects output levels in complementary PWM mode and
reset-synchronized PWM mode.
Bit 0
OLS3 Description
0 TIOCB3, TOCXA4, and TOCXB4 outputs are inverted
1 TIOCB3, TOCXA4, and TOCXB4 outputs are not inverted

8.2.7 Timer Counters (TCNT)

TCNT is a 16-bit counter. The ITU has five TCNTs, one for each channel.
Channel Abbreviation Function
0 TCNT0 Up-counter
1 TCNT1
2 TCNT2 Phase counting mode: up/down-counter
Other modes: up-counter
3 TCNT3 Complementary PWM mode: up/down-counter
Other modes: up-counter
4 TCNT4
Bit 15 14 13
Initial value 0 0 0
Read/Write R/W R/W R/W
Each TCNT is a 16-bit readable/writable register that counts pulse inputs from a clock source. The
clock source is selected by bits TPSC2 to TPSC0 in the timer control register (TCR).
12 11 10 9 8 7
0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
193
(Initial value)
(Initial value)
6 5 4 3 2 1 0
0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W