Hitachi H8/3032 Series Hardware Manual page 505

TSR0—Timer Status Register 0
Bit
Initial value
Read/Write
Note: Only 0 can be written, to clear the flag.
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7 6
— —
1 1
— —
Input capture/compare match flag A
0 [Clearing condition]
Read IMFA when IMFA = 1, then write 0 in IMFA
1 [Setting conditions]
TCNT = GRA when GRA functions as a compare
match register.
TCNT value is transferred to GRA by an input capture
signal, when GRA functions as an input capture register.
Input capture/compare match flag B
0 [Clearing condition]
Read IMFB when IMFB = 1, then write 0 in IMFB
1 [Setting conditions]
TCNT = GRB when GRB functions as a compare
match register.
TCNT value is transferred to GRB by an input capture
signal, when GRB functions as an input capture register.
Overflow flag
0 [Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
1 [Setting condition]
TCNT overflowed from H'FFFF to H'0000
*
H'67
5 4 3 2
— — — OVF
1 1 1 0
— — — R/(W)
490
ITU0
1 0
IMFB IMFA
0 0
R/(W) R/(W)
* * *