Usage Notes - Hitachi H8/3032 Series Hardware Manual

8.6 Usage Notes

This section describes contention and other matters requiring special attention during ITU
operations.
Contention between TCNT Write and Clear: If a counter clear signal occurs in the T
TCNT write cycle, clearing of the counter takes priority and the write is not performed. See
figure 8-61.
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T
ø
Address
Internal write signal
Counter clear signal
TCNT
Figure 8-61 Contention between TCNT Write and Clear
TCNT write cycle
T T
1 2 3
TCNT address
N H'0000
254
state of a
3