5.4.3 Interrupt Response Time
Table 5-5 indicates the interrupt response time from the occurrence of an interrupt request until
the first instruction of the interrupt service routine is executed.
Table 5-5 Interrupt Response Time
No.
1
2
3
4
5
6
Total
Notes: 1. 1 state for internal interrupts.
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Item
Interrupt priority decision
Maximum number of states
until end of current instruction
Saving PC and CCR to stack
Vector fetch
Instruction prefetch
*2
*3
Internal processing
2. Prefetch after the interrupt is accepted and prefetch of the first instruction in the interrupt
service routine.
3. Internal processing after the interrupt is accepted and internal processing after prefetch.
4. The number of states increases if wait states are inserted in external memory access.
External Memory
8-Bit Bus
On-Chip
Memory
2 States
*1
*1
2
2
1 to 23
1 to 27
4
8
4
8
4
8
4
4
19 to 41
31 to 57
98
3 States
*1
2
*4
1 to 31
12
*4
*4
12
12
*4
4
43 to 73