Hitachi H8/3032 Series Hardware Manual page 485

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Table A-3 Number of Cycles per Instruction (cont)
Instruction Mnemonic
DEC
DIVXS
DIVXU
EEPMOV
EXTS
EXTU
INC
JMP
JSR
LDC
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I
DEC.B Rd
1
DEC.W #1/2, Rd
1
DEC.L #1/2, ERd
1
DIVXS.B Rs, Rd
2
DIVXS.W Rs, ERd
2
DIVXU.B Rs, Rd
1
DIVXU.W Rs, ERd
1
EEPMOV.B
2
EEPMOV.W
2
EXTS.W Rd
1
EXTS.L ERd
1
EXTU.W Rd
1
EXTU.L ERd
1
INC.B Rd
1
INC.W #1/2, Rd
1
INC.L #1/2, ERd
1
JMP @ERn
2
JMP @aa:24
2
JMP @@aa:8 Normal
2
Advanced 2
JSR @ERn
Normal
2
Advanced 2
JSR @aa:24 Normal
2
Advanced 2
JSR @@aa:8 Normal
2
Advanced 2
LDC #xx:8, CCR
1
LDC Rs, CCR
1
LDC @ERs, CCR
2
LDC @(d:16, ERs), CCR 3
LDC @(d:24, ERs), CCR 5
LDC @ERs+, CCR
2
LDC @aa:16, CCR
3
LDC @aa:24, CCR
4
Stack
Byte Data Word Data Internal
Addr. Read Operation Access
J
K
L
2n + 2
*1
2n + 2
*1
1
2
1
2
1
2
1
1
2
2
470
Access
Operation
M
N
12
20
12
20
2
2
2
2
2
1
1
1
1
2
1
1

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