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Table 17-6 Timing of On-Chip Supporting Modules
Condition A: V
Condition B: V
Condition C: V
Item
ITU
SCI
Downloaded from
Elcodis.com
electronic components distributor
= 2.7 V to 5.5 V, AV
CC
V
= AV
= 0 V, ø = 2 MHz to 8 MHz, T
SS
SS
specifications), T
= –40°C to +85°C (wide-range specifications)
a
= 3.0 V to 5.5 V, AV
CC
V
= 0 V, ø = 2 MHz to 10 MHz, T
SS
T
= –40°C to +85°C (wide-range specifications)
a
= 5.0 V ± 10%, AV
CC
V
= AV
= 0 V, ø = 2 MHz to 16 MHz, T
SS
SS
specifications), T
= –40°C to +85°C (wide-range specifications)
a
Condition A
8 MHz
Symbol
Min
Timer output
t
—
TOCD
delay time
Timer input
t
50
TICS
setup time
Timer clock
t
50
TCKS
input setup time
Timer
Single
t
1.5
TCKWH
clock
edge
pulse
Both
t
2.5
TCKWL
width
edges
Input
Asyn-
t
4
SCYC
clock
chronous
cycle
Syn-
t
6
SCYC
chronous
Input clock rise
t
—
SCKR
time
Input clock fall
t
—
SCKF
time
Input clock
t
0.4
SCKW
pulse width
= 2.7 V to 5.5 V, V
= 2.7 V to AV
CC
REF
= –20°C to +75°C (regular
a
= 3.0 V to 5.5 V, V
= 3.0 V to AV
CC
REF
= –20°C to +75°C (regular specifications),
a
= 5.0 V ± 10%, V
= 4.5 V to AV
CC
REF
= –20°C to +75°C (regular
a
Condition B
Condition C
10 MHz
16 MHz
Max
Min
Max
Min
100
—
100
—
—
50
—
50
—
50
—
50
—
1.5
—
1.5
—
2.5
—
2.5
—
4
—
4
—
6
—
6
1.5
—
1.5
—
1.5
—
1.5
—
0.6
0.4
0.6
0.4
434
,
CC
,
CC
,
CC
Test
Max
Unit
Conditions
100
ns
Figure 17-12
—
—
Figure 17-13
—
t
CYC
—
—
Figure 17-14
—
1.5
1.5
0.6
t
SCYC
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