Hitachi H8/3032 Series Hardware Manual page 512

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TIER3—Timer Interrupt Enable Register 3
Bit 7
—
Initial value 1
Read/Write —
Note: Bit functions are the same as for ITU0.
TSR3—Timer Status Register 3
Bit 7
—
Initial value 1
Read/Write —
Overflow flag
0 [Clearing condition]
1 [Setting condition]
Note: Only 0 can be written, to clear the flag. *
TCNT3 H/L—Timer Counter 3 H/L
Bit 15 14 13
Initial value 0 0 0
Read/Write R/W R/W R/W
6 5 4 3
— — — —
1 1 1 1
— — — —
6 5 4 3
— — — —
1 1 1 1
— — — —
Read OVF when OVF = 1, then write 0 in OVF
TCNT overflowed from H'FFFF to H'0000 or underflowed from
H'0000 to H'FFFF
12 11 10 9 8 7
0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W
Complementary PWM mode:
Other modes:
497
H'84 ITU3
2 1 0
OVIE IMIEB IMIEA
0
0 0
R/W R/W R/W
H'85 ITU3
2 1 0
OVF IMFB IMFA
0 0 0
R/(W) * R/(W) * R/(W)
Bit functions are the
same as for ITU0
H'86, H'87 ITU3
6 5 4 3 2 1
0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
up/down counter
up-counter
*
0
0