Power-Down State; Overview - Hitachi H8/3032 Series Hardware Manual

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Section 16 Power-Down State

16.1 Overview

The H8/3032 Series has a power-down state that greatly reduces power consumption by halting
CPU functions. The power-down state includes the following three modes:
• Sleep mode
• Software standby mode
• Hardware standby mode
Table 16-1 indicates the methods of entering and exiting these power-down modes and the status
of the CPU and on-chip supporting modules in each mode.
Table 16-1 Power-Down State
Entering
Mode Conditions Clock
Sleep SLEEP instruc- Active
mode tion executed
while SSBY = 0
in SYSCR
Software SLEEP instruc- Halted
standby tion executed
mode while SSBY = 1
in SYSCR
Hardware Low input at Halted
STBY pin
standby
mode
Note: * The RAME bit must be cleared to 0 in SYSCR before the transition from the program execution state
to hardware standby mode.
Legend
SYSCR: System control register
SSBY: Software standby bit
State
CPU Supporting
CPU Registers Functions
Halted Held Active
Halted Held Halted
and
reset
Halted Undeter Halted
mined and
reset
411
I/O Exiting
RAM Ports Conditions
Held Held • Interrupt
• RES
• STBY
Held Held • NMI
• IRQ to IRQ
0 2
• RES
• STBY
Held *
• STBY
High
impedance • RES