Hitachi H8/3032 Series Hardware Manual page 337

Table of Contents

Advertisement

Bit 7—Transmit Interrupt Enable (TIE): Enables or disables the transmit-data-empty interrupt
(TXI) requested when the TDRE flag in SSR is set to 1 due to transfer of serial transmit data from
TDR to TSR.
Bit 7
TIE
0
1
Note: * TXI interrupt requests can be cleared by reading the value 1 from the TDRE flag, then
Bit 6—Receive Interrupt Enable (RIE): Enables or disables the receive-data-full interrupt
(RXI) requested when the RDRF flag is set to 1 in SSR due to transfer of serial receive data from
RSR to RDR; also enables or disables the receive-error interrupt (ERI).
Bit 6
RIE
0
1
Note: * RXI and ERI interrupt requests can be cleared by reading the value 1 from the RDRF, FER,
Bit 5—Transmit Enable (TE): Enables or disables the start of SCI serial transmitting operations.
Bit 5
TE
0
1
Notes: 1. The TDRE bit is locked at 1 in SSR.
Downloaded from
Elcodis.com
electronic components distributor
Description
Transmit-data-empty interrupt request (TXI) is disabled*
Transmit-data-empty interrupt request (TXI) is enabled
clearing it to 0; or by clearing the TIE bit to 0.
Description
Receive-end (RXI) and receive-error (ERI) interrupt requests are disabled (Initial value)
Receive-end (RXI) and receive-error (ERI) interrupt requests are enabled
PER, or ORER flag, then clearing it to 0; or by clearing the RIE bit to 0.
Description
*1
Transmitting disabled
Transmitting enabled
*2
2. In the enabled state, serial transmitting starts when the TDRE bit in SSR is cleared to 0
after writing of transmit data into TDR. Select the transmit format in SMR before setting
the TE bit to 1.
322
(Initial value)
(Initial value)

Advertisement

Table of Contents
loading

Table of Contents