Hitachi H8/3032 Series Hardware Manual page 277

Contention between Buffer Register Write and Input Capture: If a buffer register is used for
input capture buffering and an input capture signal occurs in the T
capture takes priority and the write to the buffer register is not performed.
See figure 8-69.
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Address
Internal write signal
Input capture signal
GR
BR
Figure 8-69 Contention between Buffer Register Write and Input Capture
state of a write cycle, input
3
Buffer register write cycle
T T T
1 2 3
BR address
N X
M N
262
TCNT value