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Table D-1 Port States (cont)
Pin
Name
Mode
P7
to P7
1 to 3
7
0
P8
to P8
1 to 3
3
0
P9
, P9
,
1 to 3
4
2
P9
0
PA
to PA
1 to 3
7
0
PB
to PB
1 to 3
7
0
Legend
H:
High
L:
Low
T:
High-impedance state
keep: Input pins are in the high-impedance state; output pins maintain their previous state.
DDR: Data direction register bit
Hardware Software
Reset
Standby
Standby
State
Mode
Mode
T
T
T
T
T
keep
T
T
keep
T
T
keep
T
T
keep
551
Program
Sleep
Execution
Mode
Sleep Mode
T
Input port
keep
I/O port
keep
I/O port
keep
I/O port
keep
I/O port
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