Clearing Of Status Flags - Hitachi H8/3032 Series Hardware Manual

ø
TCNT
Overflow
signal
OVF
OVI

8.5.2 Clearing of Status Flags

If the CPU reads a status flag while it is set to 1, then writes 0 in the status flag, the status flag is
cleared. Figure 8-60 shows the timing.
ø
Address
IMF, OVF
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H'FFFF
Figure 8-59 Timing of Setting of OVF
TSR write cycle
T
1
Figure 8-60 Timing of Clearing of Status Flags
252
H'0000
T T
2 3
TSR address