Hitachi H8/3032 Series Hardware Manual page 249

In complementary PWM mode, TCNT3 and TCNT4 overshoot and undershoot at the transitions
between up-counting and down-counting. The setting conditions for the IMFA bit in channel 3
and the OVF bit in channel 4 differ from the usual conditions. In buffered operation the buffer
transfer conditions also differ. Timing diagrams are shown in figures 8-37 and 8-38.
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TCNT3
GRA3
IMFA
Buffer transfer
signal (BR to GR)
GR
Figure 8-37 Overshoot Timing
N – 1 N N + 1
N
Set to 1
Buffer transfer
234
N N – 1
Flag not set
No buffer transfer