Hitachi H8/3032 Series Hardware Manual page 242

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Sample Setup Procedure for Reset-Synchronized PWM Mode: Figure 8-31 shows a sample
procedure for setting up reset-synchronized PWM mode.
Reset-synchronized PWM mode
Stop counter
Select counter clock
Select counter clear source
Select reset-synchronized
PWM mode
Set TCNT
Set general registers
Start counter
Reset-synchronized PWM mode
Figure 8-31 Setup Procedure for Reset-Synchronized PWM Mode (Example)
1. Clear the STR3 bit in TSTR to 0 to
halt TCNT3. Reset-synchronized
PWM mode must be set up while
TCNT3 is halted.
1
2. Set bits TPSC2 to TPSC0 in TCR to
select the counter clock source for
channel 3. If an external clock source
is selected, select the external clock
2
edge(s) with bits CKEG1 and CKEG0
in TCR.
3. Set bits CCLR1 and CCLR0 in TCR3
3
to select GRA3 compare match as
the counter clear source.
4. Set bits CMD1 and CMD0 in TFCR to
select reset-synchronized PWM mode.
4
TIOCA3, TIOCB3, TIOCA4, TIOCB4,
TOCXA4, and TOCXB4 automatically
become PWM output pins.
5
5. Preset TCNT3 to H'0000. TCNT4
need not be preset.
6. GRA3 is the waveform period register.
Set the waveform period value in
6
GRA3. Set transition times of the
PWM output waveforms in GRB3,
GRA4, and GRB4. Set times within
7
the compare match range of TCNT3.
≤
X GRA3 (X: setting value)
7. Set the STR3 bit in TSTR to 1 to start
TCNT3.
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