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RES
Address
bus
Internal read
signal
Internal write
signal
On chip data
(1), (3)
Address of reset vector: (1) = H'00000, (3) = H'00002
(2), (4)
Start address (contents of reset vector)
(5)
Start address
(6)
First instruction of program
Note: After a reset, the wait-state controller inserts three wait states in every bus cycle.
Prefetch of
Internal
first program
Vector fetch
processing
instruction
(1)
(3)
(2)
(4)
(5)
(6)