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Table 8-11 (b) ITU Operating Modes (Channel 1)
TSNC
TMDR
Synchro-
Operating Mode
nization
MDF
FDIR PWM
Synchronous preset
SYNC1 = 1 —
—
PWM mode
—
—
o
Output compare A
—
—
o
Output compare B
—
—
o
Input capture A
—
—
o
Input capture B
—
—
o
Counter By compare
—
—
o
clearing match/input
capture A
By compare
—
—
o
match/input
capture B
Syn-
SYNC1 = 1 —
—
chronous
clear
Legend:
Setting available (valid). — Setting does not affect this mode.
o
Notes: 1. The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
2. Valid only when channels 3 and 4 are operating in complementary PWM mode or reset-synchronized PWM mode.
Register Settings
TFCR
TOCR
Reset-
Comple- Synchro-
mentary nized
Buffer-
PWM
PWM
ing
XTGD Select
—
—
—
—
o
PWM1 = 1 —
—
—
—
PWM1 = 0 —
—
—
—
—
—
—
—
o
PWM1 = 0 —
—
—
*2
o
PWM1 = 0 —
—
—
—
—
—
—
—
o
—
—
—
—
o
—
—
—
—
o
265
TOER
TIOR1
Output
Level
Master
Clear
Enable IOA
IOB
Select
—
—
o
o
o
—
—
—
*1
o
o
—
—
IOA2 = 0
o
o
Other bits
unrestricted
—
—
IOB2 = 0
o
o
Other bits
unrestricted
—
—
IOA2 = 1
o
o
Other bits
unrestricted
—
—
IOB2 = 1
o
o
Other bits
unrestricted
—
—
CCLR1 = 0
o
o
CCLR0 = 1
—
—
CCLR1 = 1
o
o
CCLR0 = 0
—
—
CCLR1 = 1
o
o
CCLR0 = 1
TCR1
Clock
Select
o
o
o
o
o
o
o
o
o