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ASTCR—Access State Control Register
Bit
Initial value
Read/Write
WCR—Wait Control Register
Bit
Initial value
Read/Write
Wait mode select 1 and 0
WMS1
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7
6
AST7
AST6
1
1
R/W
R/W
Area 7 to 0 access state control
Bits 7 to 0
AST7 to AST0
0
1
7
6
—
—
1
1
—
—
Bit 3
Bit 2
WMS0
Wait Mode
0
0
Programmable wait mode
1
No wait states inserted by
wait-state controller
1
0
Pin wait mode
1
Pin auto-wait mode
H'ED
5
4
3
AST5
AST4
AST3
1
1
1
R/W
R/W
R/W
Number of States in Access Cycle
Areas 7 to 0 are two-state access areas
Areas 7 to 0 are three-state access areas
H'EE
5
4
3
—
—
WMS1
WMS0
1
1
0
—
—
R/W
Wait count 1 and 0
Bit 1
Bit 0
WC1
WC0
0
0
1
1
0
1
526
Bus controller
2
1
0
AST2
AST1
AST0
1
1
1
R/W
R/W
R/W
Bus controller
2
1
0
WC1
WC0
0
1
1
R/W
R/W
R/W
Number of Wait States
No wait states inserted by
wait-state controller
1 state inserted
2 states inserted
3 states inserted
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