Hitachi H8/3032 Series Hardware Manual page 501

TFCR—Timer Function Control Register
Bit
Initial value
Read/Write
Downloaded from Elcodis.com electronic components distributor
7 6
— — CMD1
1 1
— — R/W
Combination mode 1 and 0
Bit 5 Bit 4
CMD1 CMD0 Operating Mode of Channels 3 and 4
0 0 Channels 3 and 4 operate normally
1
1 0 Channels 3 and 4 operate together in complementary PWM mode
1 Channels 3 and 4 operate together in reset-synchronized PWM mode
H'63
5 4 3 2
CMD0 BFB4 BFA4
0 0 0 0
R/W R/W R/W
Buffer mode A3
0 GRA3 operates normally
1 GRA3 is buffered by BRA3
Buffer mode B3
0 GRB3 operates normally
1 GRB3 is buffered by BRB3
Buffer mode A4
0 GRA4 operates normally
1 GRA4 is buffered by BRA4
Buffer mode B4
0 GRB4 operates normally
1 GRB4 is buffered by BRB4
486
ITU (all channels)
1 0
BFB3 BFA3
0 0
R/W R/W