Hitachi H8/3032 Series Hardware Manual page 484

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Table A-3 Number of Cycles per Instruction (cont)
Instruction Mnemonic
BNOT BNOT #xx:3, Rd
BNOT #xx:3, @ERd
BNOT #xx:3, @aa:8
BNOT Rn, Rd
BNOT Rn, @ERd
BNOT Rn, @aa:8
BOR BOR #xx:3, Rd
BOR #xx:3, @ERd
BOR #xx:3, @aa:8
BSET BSET #xx:3, Rd
BSET #xx:3, @ERd
BSET #xx:3, @aa:8
BSET Rn, Rd
BSET Rn, @ERd
BSET Rn, @aa:8
BSR BSR d:8 Normal
Advanced
BSR d:16 Normal
Advanced
BST BST #xx:3, Rd
BST #xx:3, @ERd
BST #xx:3, @aa:8
BTST BTST #xx:3, Rd
BTST #xx:3, @ERd
BTST #xx:3, @aa:8
BTST Rn, Rd
BTST Rn, @ERd
BTST Rn, @aa:8
BXOR BXOR #xx:3, Rd
BXOR #xx:3, @ERd
BXOR #xx:3, @aa:8
CMP CMP.B #xx:8, Rd
CMP.B Rs, Rd
CMP.W #xx:16, Rd
CMP.W Rs, Rd
CMP.L #xx:32, ERd
CMP.L ERs, ERd
DAA DAA Rd
DAS DAS Rd
Instruction Branch Stack
Fetch Addr. Read Operation Access
I J K
1
2
2
1
2
2
1
2
2
1
2
2
1
2
2
2 1
2 2
2 1
2 2
1
2
2
1
2
2
1
2
2
1
2
2
1
1
2
1
3
1
1
1
469
Byte Data Word Data Internal
Access Operation
L M N
2
2
2
2
1
1
2
2
2
2
2
2
2
2
1
1
1
1
1
1