Kruger Ecowatt K320 Series Operation Manual page 290

Variable frequency drive
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Ecowatt
Drive K320 series
Communication
®
Bit check on individual bytes (odd/even check)
You can select the bit check mode as required, or you can choose not to perform the check,
which will affect the check bit setting of each byte.
Definition of even check: Before the data is transmitted, an even check bit is added to indicate
whether the number of "1" in the to-be-transmitted data is odd or even. If it is even, the check
bit is set to "0"; and if it is odd, the check bit is set to "1".
Definition of odd check: Before the data is transmitted, an odd check bit is added to indicate
whether the number of "1" in the to-be-transmitted data is odd or even. If it is odd, the check
bit is set to "0"; and if it is even, the check bit is set to "1".
For example, the data bits to be transmitted are "11001110", including five "1". If the even check
is applied, the even check bit is set to "1"; and if the odd check is applied, the odd check bit is
set to "0". During the transmission of the data, the odd/even check bit is calculated and placed
in the check bit of the frame. The receiving device performs the odd/even check after
receiving the data. If it finds that the odd/even parity of the data is inconsistent with the
preset information, it determines that a communication error occurs.
Cyclical Redundancy Check (CRC) method
A frame in the RTU format includes an error detection domain based on the CRC calculation.
The CRC domain checks all the content of the frame. The CRC domain consists of two bytes,
including 16 binary bits. It is calculated by the transmitter and added to the frame. The
receiver calculates the CRC of the received frame, and compares the result with the value in
the received CRC domain. If the two CRC values are not equal to each other, errors occur in the
transmission.
During CRC, 0xFFFF is stored first, and then a process is invoked to process a minimum of 6
contiguous bytes in the frame based on the content in the current register. CRC is valid only
for the 8-bit data in each character. It is invalid for the start, end, and check bits.
During the generation of the CRC values, the "exclusive or" (XOR) operation is performed on the
each 8-bit character and the content in the register. The result is placed in the bits from the
low-order bit to the high-order bit, and 0 is placed in the high-order bit. Then, the low-order bit
is detected. If the low-order bit is 1, the XOR operation is performed on the current value in the
register and the preset value. If low-order bit is 0, no operation is performed. This process is
repeated 8 times. After the last bit (8th bit) is detected and processed, the XOR operation is
performed on the next 8-bit byte and the current content in the register. The final values in the
register are the CRC values obtained after operations are performed on all the bytes in the
frame.
The calculation adopts the international standard CRC check rule. You can refer to the related
standard CRC algorithm to compile the CRC calculation program as required.
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