Internal Clock Mode - Fujitsu MB95630H Series Hardware Manual

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MB95630H Series
20.6.1

Internal Clock Mode

In this mode, the 16-bit downcounter counts down while being synchronized
with the internal count clock, and outputs an interrupt request to the interrupt
controller every time an underflow occurs ("0x0000" → "0xFFFF"). In addition,
the TOn pin can output the toggle waveform.
■ Setting Internal Clock Mode
The timer requires the register settings shown in Figure 20.6-2 to operate as an interval timer.
TMCSRHn
TMCSRLn
TMRLRHn
TMRLRLn
: Used bit
0 : Set to "0"
1 : Set to "1"
■ Operation of Internal Clock Mode (Reload Mode)
When "1" is set to the count enable bit (CNTE) to enable counting, and the timer is started by
setting "1" to the software trigger bit (TRG) or by an external trigger, the value set in the 16-bit
reload timer reload register (upper/lower) (TMRLRHn/TMRLRLn) is reloaded to the 16-bit
downcounter and downcounting starts. If counting is enabled when the count enable bit
(CNTE) and software trigger bit (TRG) are set to "1" at the same time, the counting starts at the
same time.
If the reload select bit (RELD) is "1", the value of the 16-bit reload timer reload register
(upper/lower) (TMRLRHn/TMRLRLn) is reloaded to the 16-bit downcounter and the count
continues when the 16-bit counter underflows ("0x0000" → "0xFFFF"). If the underflow
interrupt request flag bit (UF) is "1" when the underflow interrupt request enable bit (INTE) is
set to "1", an interrupt request is output.
The TOn pin can output a toggle waveform that is inverted every time an underflow occurs.
MN702-00009-1v0-E
Figure 20.6-2 Internal Clock Mode Setup
bit7
bit6
bit5
-
-
CSL2
Other than "0b111"
bit7
bit6
bit5
-
OUTE
OUTL
RELD
0
bit7
bit6
bit5
D15
D14
D13
Set initial value of counter (reload value) (upper)
bit7
bit6
bit5
D7
D6
D5
Set initial value of counter (reload value) (lower)
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER 20 16-BIT RELOAD TIMER
20.6 Operations and Setting Procedure Example
bit4
bit3
bit2
CSL1
CSL0
MOD2 MOD1 MOD0
0
bit4
bit3
bit2
INTE
UF
bit4
bit3
bit2
D12
D11
D10
bit4
bit3
bit2
D4
D3
D2
bit1
bit0
bit1
bit0
CNTE
TRG
1
bit1
bit0
D9
D8
bit1
bit0
D1
D0
363

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