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memory bandwidth for the graphics subsystem. Video signals are available at the ZT 5504's
J6 faceplate connector
Control)" in Chapter 3 for information on directing video signals to the front or rear of the board.
The "Video" topic in Appendix E contains a link to the datasheet for this device.
PCI Mezzanine Card (PMC) Interface
The ZT 5504 provides a location for one on-board PMC device with front panel access. The
PMC interface is on PCI Bus 0 and uses a 32-bit 3.3V PCI bus.
The
"PMC
Specification" topic in Appendix E contains a link to the sponsoring organization for
the PMC specification.
Dual Ethernet Interfaces
The ZT 5504 provides two 10/100BaseTx Ethernet channels (A and B) through the
Intel® 82550 Fast Ethernet Multifunction PCI Controller with integrated Alert On LAN (AOL).
The 82550 consists of both the Media Access Controller (MAC) and the physical layer (PHY)
interface combined into a single component solution. Two RJ-45 connectors with integrated
LEDs are available at the faceplate. Both Ethernet channels can be directed to the J3
backplane connector. See
" topic in
The
"Ethernet
used on the ZT 5504.
IDE Hard Drive
The ZT 5504 includes an on-board 2.5-inch Enhanced IDE hard drive. The hard drive is on the
ZT 5504's primary IDE channel and is assigned "device 0" (master) identity.
See Chapter 6,
"IDE
Controller", for more information.
Serial I/O
The ZT 5504 provides support for two RS-232 compatible serial ports. COM1 is accessible at
the faceplate through an RJ-45 connector or through the J5 Rear Panel I/O connector. This
port is typically used for test access. COM2 is accessible only through the J5 Rear Panel I/O
connector. No strapping option or software control is required to use either port.
The front panel RJ-45 connector is configured as DTE. SRI (Serial Ring Indicator) and SCD
(Serial Carrier Detect) signals are not included in the front panel RJ-45 connector. Refer to the
"J10 (COM1 Serial
Port)" topic in Appendix A for a connector pinout.
Note:
COM1 signals are available to the front- and rear-panel simultaneously. Utilizing the
COM1 signal at the front and rear at the same time will cause a signaling conflict.
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or at the
J5 Rear Panel I/O
"Geographic Addressing
Appendix E contains links to the datasheets for the Ethernet devices
connector. See
"SW2-3 (VGA Routing
(E4h)" in Appendix C for more information.
1. Introduction
18
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