Information Manual
April 1998
8.1 PIO Operation
(continued)
8.1.4 Peripheral Mode (Host Interface) (continued)
Peripheral Mode Input
The external device drives PIDS, PSEL2, and the PB.
As with all passive accesses, an external device must start off by driving PSEL2 low enabling the PIO. If the flags
are being monitored, this can be in response to PIBF or PSEL0 going low. The external device then drives PIDS
low. It must then place the data on the PB and leave it there until after PIDS is driven high. After the next full phase
that CKO is high, PIBF and PSEL0 will be set indicating the input buffer is now full. As with any other passive mode
access, the access is timed by the external device.
PSEL2
(CHIP SELECT) FROM
EXTERNAL DEVICE
PSEL0
(PIBF/POBE)
FROM DSP
PIBF
FROM DSP
PIDS FROM
EXTERNAL DEVICE
PB FROM
EXTERNAL DEVICE
Lucent Technologies Inc.
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
OR
Figure 8-8. Peripheral Mode Input Timing
DRAFT COPY
Parallel I/O (DSP1617 Only)
CKO
5-4129
8-11