Figure 8-2.Active Mode Input Timing (Minimum Width Pids); Active Mode - Lucent Technologies DSP1617 Information Manual

Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Parallel I/O (DSP1617 Only)
8.1 PIO Operation
(continued)
8.1.1 Active Mode (continued)
Active Mode Input
The DSP drives PIDS, and the external device drives the PB.
The active mode input transaction (see Figure 8-2) is initiated by the DSP if it executes a data move from one of the
pdx channels (e.g., *r2 = pdx0). If an active mode input occurs, PSEL[2:0] are asserted indicating which of eight
external sources for the data has been selected. One-half a CKO cycle later, PIDS is pulled low signaling that an
external device can place data on the parallel data bus (PB). The duration of PIDS is configurable in the pioc reg-
ister, see Table 8-1. The diagram below is using minimum strobe widths, so PIDS is held low for one full CKO
cycle. (For longer strobe widths, PIDS is held low for the corresponding number of CKO cycles.) The external
device must place valid data on the PB before PIDS goes high. It can remove data from the PB after PIDS goes
high. The value on the three PSEL pins is maintained one-half of a CKO cycle after PIDS is released.
CKO
PSEL[2:0]
PIDS
PB
5-4188
Figure 8-2. Active Mode Input Timing (Minimum Width PIDS)
DRAFT COPY
Lucent Technologies Inc. 8-3