Updateconv Instruction With Soft Decisions; Table 14-8. Representative Updateconv Instruction Cycles (Sh = 0) - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Error Correction Coprocessor (DSP1618/28 Only)
14.6 ECCP Instruction Timing

14.6.4 UpdateConv Instruction with Soft Decisions

With the ECON.SH field set to 0 (i.e., with soft decision mode selected), the following formula yields the number of
instruction cycles for the UpdateConv instruction:
UpdateConv SH
where CL represents the value of the constraint length field in the ECON register and TBLR is the traceback length
value programmed into the TBLR register.
instruction cycles with the soft decision mode selected for different values of CL and TBLR.

Table 14-8. Representative UpdateConv Instruction Cycles (SH = 0)

CL
0
0
0
0
0
1
1
1
1
1
2
2
2
2
2
3
3
3
3
3
4
Similar to the UpdateMLSE, the traceback length can attain a maximum value of 31 with the soft decision mode
programmed (i.e., with ECON.SH = 0).
14-22
(continued)
( )Cycles
= 0 =
Table 14-8
TBLR
1—6
7
8
9
10
1—9
10
11
12
13
1—15
16
17
18
19
1—27
28
29
30
31
1—31
( ) Max 0 [ TBLR 2
CL + 2
14 + 2 + ,
shows some representative values for the UpdateConv
Cycles
18
19
20
21
22
22
23
24
25
26
30
31
32
33
34
46
47
48
49
50
78
DRAFT COPY
Information Manual
April 1998
( ) ]
CL + 2 CL
– + 2 – 3
Lucent Technologies Inc.