3 Software Architecture ...................................................................................................................................3-1
3.1
Register View of the DSP1611/17/18/27/28/29 .................................................................................3-1
3.1.1
Types of Registers ..............................................................................................................3-1
3.1.2
Register Length Definition ..................................................................................................3-5
3.1.3
Register Reset Values ........................................................................................................3-6
3.1.4
Flags ...................................................................................................................................3-7
3.2
Memory Space and Addressing.........................................................................................................3-8
3.2.1
Y-Memory Space ................................................................................................................3-8
3.2.2
X-Memory Space ..............................................................................................................3-10
3.3
Arithmetic and Precision ..................................................................................................................3-21
3.4
Interrupts..........................................................................................................................................3-27
3.4.1
Introduction .......................................................................................................................3-27
3.4.2
Interrupt Sources ..............................................................................................................3-29
3.4.3
Outputs of Interrupts .........................................................................................................3-31
3.4.4
Interrupt Operation ............................................................................................................3-32
3.4.5
Trap Description ................................................................................................................3-38
3.4.6
Powerdown with the AWAIT State .....................................................................................3-40
3.4.7
Interrupts in DSP16A-Compatible Mode (DSP1617 Only) ................................................3-42
3.4.8
3.5
3.5.1
PLL Control Signals ..........................................................................................................3-48
3.5.2
PLL Programming Examples ............................................................................................3-50
3.5.3
Latency .............................................................................................................................3-50
3.6
Power Management .........................................................................................................................3-52
3.6.1
3.6.2
STOP Pin ..........................................................................................................................3-56
3.6.3
3.6.4
3.6.5
3.6.6
CHAPTER 3. SOFTWARE ARCHITECTURE
CONTENTS