Programmer Interface; Table 8-5. Port Encoding Pdx<0-7 - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Parallel I/O (DSP1617 Only)

8.2 Programmer Interface

The PIO port can be accessed with the data move group of instructions. The eight logical ports (pdx0—pdx7) cor-
respond to the encoding on the 3-bit field formed by the pins PSEL[2:0]. For example, an access to pdx3 will result
in the 3-bit field 011 appearing on the three pins (PSEL[2:0]) in active-active mode. The complete encoding of the
ports is shown in Table 8-5.
Table 8-5. Port Encoding pdx<0—7>
PODS PIDS
Active Active
Active Passive
Passive Active
Passive Passive
When programming the device, nine PIO registers can be referenced:

pioc
PIO control register.

pdx0 Logical port 0.

pdx1 Logical port 1.

pdx2 Logical port 2.

pdx3 Logical port 3.

pdx4 Logical port 4.

pdx5 Logical port 5.

pdx6 Logical port 6.

pdx7 Logical port 7.
Note: pdx0—pdx7 all reference the same physical registers—pdx[IN] and pdx[OUT]. A read instruction accesses
pdx[IN], and a write instruction accesses pdx[OUT]. For example:
*r0=pdx1
pdx3=*r0
8-14
PSEL2 PSEL1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
x 0
x 0
x 1
x 1
x x
x x
x x
/* writes memory from pdx(in)
/* reads memory to pdx(out)
DRAFT COPY
PSEL0 Port pdx<0—7>
0 0
1 1
0 2
1 3
0 4
1 5
0 6
1 7
0 0, 4
1 1, 5
0 2, 6
1 3, 7
0 0, 2, 4, 6
1 1, 3, 5, 7
x 0—7
Information Manual
April 1998
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Lucent Technologies Inc.