Cache Instructions; Table 4-6. Example Of Execution Of Cache Instruction; Table 4-7. Replacement Table For Cache Instructions - Lucent Technologies DSP1617 Information Manual

Digital signal processor
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DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Instruction Set
4.5 Instruction Set

4.5.2 Cache Instructions

Cache instructions implement low-overhead loops. The use of cache loops conserves program memory, speeds
execution time, and reduces power dissipation. The do instruction treats the specified N instructions as a loop to
be executed K times. The redo instruction treats the previous N instructions as another loop to be executed K
times. Both cache instructions use one program memory location. The do instruction executes in one instruction
cycle, but the redo instruction executes in two instruction cycles.
The value of K can also be written to the cloop register to specify the number of iterations at run time. The value in
cloop is used if K is specified as zero in the instruction encoding. The value in cloop decrements every cache loop
and is decremented to zero at the end of the do or redo instruction. (The cloop register will also contain the cache
count from a do K or redo K instruction, K = 1 to 127).
For multiply/ALU instructions that require two reads of dual-port RAM, executing from the cache decreases the
execution time from two instruction cycles to one instruction cycle resulting in an additional increase in throughput.

Table 4-6. Example of Execution of Cache Instruction

Cache Instructions

do K {
instruction1
instruction2
.
.
instructionN
}

Table 4-7. Replacement Table for Cache Instructions

Replace
Value
K
cloop
1 to 127
N
1 to 15
† The assembly-language statements (do cloop and redo cloop) are used to specify that the number of iterations is to be
taken from the cloop register. K is set to 0 in the instruction encoding to select cloop.
4-14
(continued)
redo K
Take the number of times the instructions are to be executed from
bits 0 through 6 of the cloop register.
Number of times the instructions are to be executed, encoded in
instruction.
1 to 15 instructions can be included.
DRAFT COPY
Meaning
Information Manual
April 1998
Lucent Technologies Inc.

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