Table 6-1. Dsp1611 Instruction/Coefficient Memory Map (X-Memory Space) - Lucent Technologies DSP1617 Information Manual

Information Manual
April 1998
6.1 EMI Function
(continued)
The external instruction/coefficient memory space has one segment (EROM) with four possible memory maps for
the internal instruction/coefficient segments. The memory maps for instruction/coefficient and data space are
shown in Tables 6-1 through 6-10.
3, or 4.

Table 6-1. DSP1611 Instruction/Coefficient Memory Map (X-Memory Space)

Decimal Address in
Address pc, pt, pi, pr
0 0x0000
0x03FF
1024 0x0400
0x2FFF
12288 0x3000
0x3FFF
16384 0x4000
0x43FF
17408 0x4400
0x7FFF
32768 0x8000
0xBFFF
49152 0xC000
0xDFFF
61439 0xF000
65535 0xFFFF
† MAP1 is set automatically during an HDS trap. The user-selected map is restored at the end of the HDS trap service routine.
‡ LOWPR is an alf register bit. The Lucent Technologies development system tools can independently set the memory map.
Lucent Technologies Inc.
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Section 3.2, Memory Space and Addressing
†
MAP1 (EXM = 0 MAP2 (EXM = 1
‡
LOWPR = 0) LOWPR = 0)
IROM EROM
(1K)
Reserved
(15K)
EROM
(32K)
RAM<1—12> RAM<1—12>
(12K)
Reserved Reserved
(4K)
DRAFT COPY
External Memory Interface
describes how to select MAP1, 2,
MAP3 (EXM = 0
LOWPR = 1)
RAM<1—12>
(48K) (12K)
Reserved
(4K)
IROM
(1K)
Reserved
(15K)
EROM
(32K)
(12K)
(4K)
MAP4 (EXM = 1
LOWPR = 1)
RAM<1—12>
(12K)
Reserved
(4K)
EROM
(48K)
6-3