Information Manual
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998
Error Correction Coprocessor (DSP1618/28 Only)
14.6 ECCP Instruction Timing
ECCP Data Move Timing: Each ECCP data move instruction takes two cycles.
Viterbi Instruction Timing: Following are formulas defining the number of instruction cycles for six different cate-
gories of ECCP processes. The number of instruction cycles is measured from the time when the eir register is
written with the ECCP command to the time when the output data is ready in the edr register.
14.6.1 ResetECCP Instruction
The ResetECCP instruction has no latency.
14.6.2 UpdateMLSE Instruction with Soft Decision
The generic formula for the computation of the UpdateMLSE instruction cycles with soft decision (i.e., SH = 0) is as
follows:
(
)
(
)
CL
+
2
CL
+
2
CL
(
)Cycles
Max 0 [ TBLR 2
]
UpdateMLSE SH
=
0
=
15
+
2
+
,
+
2
4
–
–
where CL represents the value of the constraint length field in the ECON register and TBLR is the traceback length
value programmed into the TBLR register.
DRAFT COPY
Lucent Technologies Inc.
14-19