Figure 2-8.Dsp1629 Block Diagram - Lucent Technologies DSP1617 Information Manual

Information Manual
April 1998
2.1 Device Architecture Overview
2.1.3 Device Architecture (continued)
DB[15:0]
CKI
CKI2
CKO
RSTB
STOP
TRAP
INT[1:0]
IACK
VEC[3:0] OR IOBIT[7:4]
DO2 OR PSTAT
OLD2 OR PODS
OCK2 OR PCSN
OBE2 OR POBE
SYNC2 OR PBSEL
ICK2 OR PB0
ILD2 OR PIDS
DI2 OR PB1
IBF2 OR PIBF
DOEN2 OR PB2
SADD2 OR PB3
IOBIT[3:0] OR PB[7:4]
† These registers are accessible through external pins only.
‡ DSP1629x16 contains 16K x 16 internal RAM, and DSP1629x10 contains 16K x 10 internal RAM.
Lucent Technologies Inc.
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
(continued)
AB[15:0] RWN EXM
EXTERNAL MEMORY INTERFACE & EMUX
ioc
DUAL-PORT
‡
RAM
16K/10K x 16
YAB YDB XDB
DSP1600 CORE
PHIF
phifc
†
PSTAT
powerc
M
pdx0(IN)
U
X
pdx0(OUT)
Figure 2-8. DSP1629 Block Diagram
DRAFT COPY
I/O EROM ERAMHI ERAMLO
ROM
48K x 16
XAB BMU
aa0
aa1
ar0
ar1
ar2
ar3
IDB
CLOCK
SYNTHESIZER
pllc
BIO
sbit
cbit
Hardware Architecture
JTAG
BOUNDARY-SCAN
jtag
†
JCON
†
ID
†
BYPASS
HDS
†
BREAKPOINT
†
TRACE
TIMER
timerc
timer0
SIO1
sdx(OUT)
srta
SIO2
tdms
sdx2(OUT)
sdx(IN)
srta2
sioc
tdms2
sdx2(IN)
saddx
sioc2
saddx2
TDO
TDI
TCK
TMS
TRST
DI1
ICK1
ILD1
IBF1
DO1
OCK1
OLD1
OBE1
SYNC1
SADD1
DOEN1
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