Bmu Instructions; Table 4-17. Replacement Table For Bmu Instructions - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Instruction Set
4.5 Instruction Set

4.5.7 BMU Instructions

The bit manipulation unit (BMU) adds extensions that execute in one or two cycles and provide efficient bit opera-
tions on accumulators to the DSP1600 core instruction set. Instructions are provided for barrel shifting, normaliza-
tion, and bit-field insertion/extraction. The unit also contains a set of alternate accumulators that can be shuffled
with the working set. Flags returned by the BMU mesh seamlessly with the conditional instructions. The BMU con-
tains four 16-bit auxiliary registers ar<0—3> that contain input or output operands. The BMU is fully described in
Chapter 13, Bit Manipulation
aD = a SHIFT aS
S
aD = aS SHIFT arM
aD = aS SHIFT IM16
aD = exp (aS)
aD = norm (aS, arM)
aD = aS : aaT

Table 4-17. Replacement Table for BMU Instructions

Replace Value
aD, aS, aS a0, a1
SHIFT >>
<<
>>>
<<<
arM ar<0—3>
IM16 16-bit value
aaT aa0, aa1
4-30
(continued)
Unit.

BMU Instructions

aD = extracts (aS, arM)
aS = extractz (aS, arM)
aD = extracts (aS, IM16)
aD = extractz (aS, IM16)
aD = insert (aS, arM)
aD = insert (aS, IM16)
One of the two accumulators. (a is the other accumulator, with respect to aS.)
Arithmetic right shift (36-bit shift, sign filled in).
Arithmetic left shift (36-bit shift, 0s filled in).
Logical right shift (32-bit shift, 0s filled in).
Logical left shift (36-bit shift, 0s filled in).
One of the four auxiliary BMU registers.
Immediate data.
One of the alternate accumulators.
DRAFT COPY
Meaning
S
Information Manual
April 1998
Lucent Technologies Inc.