Table A-2. B Field; Table A-3. Bmu Encodings - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Instruction Encoding
A.2 Field Descriptions
(a ) Field T
(a ) field specifies transfer accumulator.
T
Table A-1. a Field
( T )
(a ) T Register
0 Accumulator 1
1 Accumulator 0
B Field
B field specifies the type of branch instruction (except
software interrupt).

Table A-2. B Field

B Operation
000 return
001 ireturn
010 goto pt
011 call pt
1xx Reserved
A-4
BMU Encodings

Table A-3. BMU Encodings

F4 AR
0000 00nn aD = aS >> arM
0001 00nn aD = aS << arM
0000 10nn aD = aS >>> arM
0001 10nn aD = aS <<< arM
1000 0000 aD = a >> aS
1001 0000 aD = a
1000 1000 aD = a >>> aS
1001 1000 aD = a
1100 0000 aD = aS >> IM16
1101 0000 aD = aS << IM16
1100 1000 aD = aS >>> IM16
1101 1000 aD = aS <<< IM16
0000 1100 aD = exp(aS)
0001 11nn aD = norm(aS, arM)
1110 0000 aD = extracts(aS, IM16)
0010 00nn aD = extracts(aS, arM)
1110 0100 aD = extractz(aS, IM16)
0010 01nn aD = extractz(aS, arM)
1110 1000 aD = insert(aS, IM16)
1010 10nn aD = insert(aS, arM)
0111 0000 aD = aS : aa0
0111 0001 aD = aS : aa1
Note: nn encodes the auxiliary register to be used (00—ar0,
01—ar1, 10—ar2, or 11—ar3).
Information Manual
April 1998
Operation
S
S << aS
S
<<< aS
S
Lucent Technologies Inc.