Ad = Insert (As, Arm - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Instruction Set Summary

aD = insert (aS, arM)

mask ← (1s in bits [OFFSET] thru [OFFSET + WIDTH]; other bits 0)
(aD) ← (((aS) << OFFSET) & mask) | ((a ) &
The low-order bits of the 36-bit aS register are inserted in an arbitrarily selected sequence of contiguous bits in a
(also 36-bit). Nonselected bits in aS are left unchanged. The merged result is then stored in aD.
This bit-field in a is defined by the 16-bit value in arM. The upper eight bits of arM hold the WIDTH of the field (in
S
bits), and the lower eight bits of arM hold the OFFSET from bit zero of a (in bits):
Bit
arM
For example, arM = 0xe06 defines a 14-bit wide field, starting from bit six of a . This replaces bits 19—6 of a with
the low-order bits of aS (bits 13—0), and place the merged result into aD.
Flags are set based on the value written into aD. The LLV flag is set if WIDTH = 0 or if (WIDTH + OFFSET) > 36.
The M field selects one of the four ar registers:
00 - ar0
Bit 15 14
Field 1 1
B-53
(bit-field insert with control word in arM)
S MASK
15—8
WIDTH
01 - ar1
13 12 11 10
1 1 0 D
Words: 1
Cycles: 2
Group: BMU
Addressing: Register
Flags affected: LMI, LEQ, LLV, LMV,
Interruptible: Yes
Cacheable: Yes
Format: 3b
DRAFT COPY
)
S
10 - ar2
9 8 7 6
S 1 0 1
ODDP, EVENP, MNS1, NMNS1
Information Manual
7—0
OFFSET
S
11 - ar3
5 4 3 2
0 0 1 0
Lucent Technologies Inc.
April 1998
S
S
1—0
M