Sio Operation; Active Clock Generator; Figure 7-2.Sio Clocks - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Serial I/O

7.1 SIO Operation

The DSP1611/17/18/27/28/29 devices contain two functionally identical SIO units. Throughout this chapter, the
SIO pin names are referenced without the 1 or 2 designation to indicate that the description applies to either. For
example, ICK refers to either ICK1 or ICK2. The following subsections describe the operation of the SIO active
clock generator and the SIO input and output ports.

7.1.1 Active Clock Generator

Active refers to generation by the DSP; passive refers to generation by external devices. The active clock signals
for the SIO section are derived from CKO (free running non-wait-stated clock) with a maximum bit rate of CKO/2. A
simplified representation of the SIO active clock and load generator is shown in
switches represent the user-programmable features. An open switch corresponds to the associated bit in the sioc
or tdms register having a value of zero.
Five signals can be individually programmed to be either inputs or outputs (passive or active): ICK, OCK, ILD, OLD,
and SYNC. ICK and OCK are the input and output port bit clocks. ILD and OLD are the input and output port word
strobes (word framing signals). SYNC is a framing signal used in multiprocessor mode (described in
Multiprocessor Mode Description) or in other applications. If using active clocks, the speed of the bit clocks can be
selected from one of four speeds: CKO (free running) is divided by 2, 6, 8, or 10. This selection determines the
speed of both ICK and OCK. The speed of ILD and OLD can be selected as either the ICK or OCK signals divided
by 16. An active SYNC signal is generated from this same source (ICK or OCK ÷ 16) and is further divided by 8 or
16. The resulting SYNC signal is either the signal ICK or OCK divided by 128 or 256. The SYNC signal can be
configured to generate an 8 kHz sampling signal for codec applications.
† CKO is a free-running non-wait-stated clock.
7-2
†
CKO
sioc(3)
sioc(5)
OUTPUT
SECTION
OCK OLD
Figure 7-2. SIO Clocks
DRAFT COPY
DIV. BY
2, 6, 8, 10
sioc(7, 8)
sioc(9)
DIV. BY
16
DIV.
BY 8, 16
tdms(9)
tdms(0)
SYNC ILD
Information Manual
Figure 7-2. In the figure, the open
sioc(2)
sioc(4)
INPUT
SECTION
ICK
Lucent Technologies Inc.
April 1998
Section 7.6,
5-4172