DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Information Manual
Software Architecture
April 1998
3.4 Interrupts
(continued)
3.4.1 Introduction (continued)
Figure 3-8
is a functional block diagram of the interrupt hardware.
IDB
CLEAR BITS
16
16
4—8,11
ONLY
INC REGISTER
INS REGISTER
MASKS
CLEARS
13
13
13
13
TRAP
INTERRUPT
icall
IACK
PROCESSING
HDS trap
VEC[3:0]
5-4115b
Figure 3-8. Interrupt Operation
DRAFT COPY
3-28
Lucent Technologies Inc.