4 Instruction Set ..............................................................................................................................................4-1
4.1
Notation .............................................................................................................................................4-2
4.2
Instruction Cycle Timing ....................................................................................................................4-2
4.3
Addressing Modes .............................................................................................................................4-3
4.3.1
4.3.2
Compound Addressing .......................................................................................................4-5
4.3.3
Direct Data Addressing .......................................................................................................4-7
4.4
Processor Flags .................................................................................................................................4-9
4.5
Instruction Set..................................................................................................................................4-11
4.5.1
Control Instructions ...........................................................................................................4-12
4.5.2
Cache Instructions ............................................................................................................4-14
4.5.3
Data Move Instructions .....................................................................................................4-15
4.5.4
Special Function Group ....................................................................................................4-19
4.5.5
Multiply/ALU Group ...........................................................................................................4-22
4.5.6
F3 ALU Instructions ..........................................................................................................4-29
4.5.7
BMU Instructions ..............................................................................................................4-30
4.5.8
Assembler Ambiguities .....................................................................................................4-35
CHAPTER 4. INSTRUCTION SET
CONTENTS