Figure 2-3.Dsp1611 Block Diagram - Lucent Technologies DSP1617 Information Manual

DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
Hardware Architecture
2.1 Device Architecture Overview
2.1.3 Device Architecture
Figures 2-3, 2-4, 2-5, 2-6, 2-7, and
DSP1628, and DSP1629 processors. The major blocks are the DSP1600 processor core, the memories, the bit
manipulation unit, the external memory interface, the serial input(s)/output(s), the parallel input/output, the bit I/O,
the JTAG, and the timer.
DB[15:0]
CKI
CKI2
CKO
RSTB
STOP
TRAP
INT[1:0]
IACK
VEC[3:0] OR IOBIT[7:4]
DO2 OR PSEL1
OLD2 OR PODS
OCK2 OR PSEL2
OBE2 OR POBE
SYNC2 OR PSEL0
ICK2 OR PB0
ILD2 OR PIDS
DI2 OR PB1
IBF2 OR PIBF
DOEN2 OR PB2
SADD2 OR PB3
IOBIT[3:0] OR PB[7:4]
† These registers are accessible through external pins only.
2-4
(continued)
2-8 show the block diagrams for DSP1611, DSP1617, DSP1618, DSP1627,
AB[15:0] RWN EXM
EXTERNAL MEMORY INTERFACE & EMUX
ioc
DUAL-PORT
RAM
12K x 16
YAB YDB XDB
DSP1600 CORE
PHIF
phifc
†
PSTAT
M
U
pdx0(IN)
X
pdx0(OUT)
Figure 2-3. DSP1611 Block Diagram
DRAFT COPY
DSEL I/O EROM ERAMHI ERAMLO
ROM
1K x 16
XAB BMU
aa0
aa1
ar0
ar1
ar2
ar3
IDB
SIO2
powerc
sdx2(OUT)
BIO srta2
sbit
tdms2
cbit
sdx2(IN)
sioc2
saddx2
Information Manual
April 1998
JTAG
BOUNDARY-SCAN
TDO
jtag
TDI
†
JCON
TCK
†
ID
TMS
†
BYPASS
HDS
†
BREAKPOINT
†
TRACE
TIMER
timerc
timer0
DI1
SIO1
ICK1
sdx(OUT)
ILD1
srta
IBF1
DO1
tdms
OCK1
OLD1
sdx(IN)
OBE1
sioc
SYNC1
SADD1
saddx
DOEN1
5-4142.a
Lucent Technologies Inc.