Timer0 Register; The Inc Register; Initialization Conditions - Lucent Technologies DSP1617 Information Manual

Information Manual DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
April 1998 Timer
12.2 Programmable Features and Operation
(continued)
12.2.1 timerc Register Encoding (continued)
When the DSP is reset, the timer is guaranteed to be in a noncounting state with clocks powered up. The RELOAD
bit of the timerc register selects one of two operating modes for the interrupt timer. If RELOAD is zero, the timer
counts down from a specified value to zero, interrupts the DSP, and then stops, awaiting further commands from
the software. If RELOAD is one, the timer counts down from a specified value to zero, interrupts the DSP, automat-
ically reloads the specified value into the timer, and repeats indefinitely. This provides either a single timed inter-
rupt event or a regular interrupt clock of arbitrary period.
The T0EN bit enables the clock to the timer. If T0EN is a one, the timer counts down towards zero. If T0EN is a
zero, the timer holds its current count.
The PRESCALE field selects one of 16 possible clock speeds for the timer input clock.
Setting the DISABLE bit of the timerc register to a logic one shuts down the timer and the prescaler for power sav-
ings. Setting the TIMERDIS (bit 4) in the powerc register has the same effect as shutting down the timer. The
DISABLE bit and the TIMERDIS bit are cleared by writing a zero to their respective registers to restore the normal
operating mode.

12.2.2 timer0 Register

The second register in the interrupt timer block is named timer0. Upon writing to this register, both the timer itself
and the optional reloadable period register are written with the specified 16-bit number. The timer, if enabled with
T0EN, then starts counting down from this number to zero at the clock rate specified by the PRESCALE field.
When the timer reaches zero, the DSP is interrupted vectoring to location 0x10.
Upon reaching a count of zero, the timer either remains quiescent until another value is written to the timer0 regis-
ter (RELOAD = 0) or automatically reloads the previous starting value from the period register into the timer regis-
ter and recommences counting down (RELOAD = 1). At any time in the sequence, a new value can be written by
the software into the timer and period registers. The timer then starts counting down from this new value.
The timer0 register can also be read at any time. The timer is read on-the-fly, and its current value is returned to
the software.

12.2.3 The inc Register

The timer interrupt can be individually enabled or disabled through the inc register. A one in bit 8 of the inc register
will enable the interrupt; a zero will disable or mask it.

12.2.4 Initialization Conditions

if the DSP is reset, the bottom 8 bits of the timerc register and the timer itself are initialized to zero. This activity
sets the prescaler to CKO/2, turns off the reload feature, disables timer counting, and initializes the timer value to
its quiescent state. The act of resetting the device does not cause the timer to interrupt the DSP. The period regis-
ter is not initialized on reset.
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