Table 8-6. Pio Control (Pioc) Register - Lucent Technologies DSP1617 Information Manual

Information Manual
April 1998
8.2 Programmer Interface
The PIO control (pioc) register (see
of the PIO:

External device access time.

Interrupt masks.

Active/passive mode.

Table 8-6. PIO Control (pioc) Register

Bit 15 14—13
Field IBF STROBE
Field Value
IBF R
STROBE
00
01
10
11
PODS 0
1
PIDS 0
1
INTERRUPTS 1xxxx
x1xxx
xx1xx
xxx1x
xxxx1
STATUS Rxxxx
xRxxx
xxRxx
xxxRx
xxxxR
† T = 1 CKO clock period.
‡ The interrupt enables and the status bits in the pioc affect only SIO1, not SIO2.
Lucent Technologies Inc.
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
(continued)
Table 8-6) is a 16-bit, user-accessible register used to configure some features
12 11 10
PODS PIDS Reserved
Description
IBF interrupt status bit (same as bit 4).
Strobe width of:
PODS PIDS
†
T T
2T 2T
3T 3T
4T 4T
PODS is an input (passive mode).
PODS is an output (active mode).
PIDS is an input (passive mode).
PIDS is an output (active mode).
IBF interrupt enabled (disabled if 0)
OBE interrupt enabled (disabled if 0)
PIDS interrupt enabled (disabled if 0).
PODS interrupt enabled (disabled if 0).
INT0 interrupt enabled (disabled if 0).
‡
IBF status bit .
‡
OBE status bit .
PIDS status bit.
PODS status bit.
INT0 status bit.
DRAFT COPY
Parallel I/O (DSP1617 Only)
9—5
INTERRUPTS
‡
.
‡
.
4—0
STATUS
8-15