Table 4-14. Instruction For Loading The X And Y Registers Into The Squaring Mode - Lucent Technologies DSP1617 Information Manual

Information Manual
April 1998
4.5 Instruction Set
4.5.5 Multiply/ALU Group (continued)

Table 4-14. Instruction for Loading the x and y Registers into the Squaring Mode

y = IM16
y = aS[l]
y = *rM
y = *rM++
y = *rM– –
y = *rM++j
F1y = Yx = *pt++[i]
F1y = aT[l]x = *pt++[i]
F1Z : yx = *pt++
Z : y
† pt will be incremented, and the value pointed to by pt will be fetched but not loaded into x. Also, any restrictions from reading the same
bank of internal memory or reading from external memory apply as if the x = *pt++[i] was actually implemented.
Function Statements
In the execution of these statements, the width of the operand is extended to 36 bits as appropriate. This is accom-
plished by sign-extending bit 31 in the p or y register to retain the correct two's complement value. The multiplier
performs a two's complement multiply by using x and the high half of y (bits 31—16).
The statements must be written in the exact format shown. If the statements are written in any other way (for
example, aD = p + aS instead of aD = aS + p), the assembler produces an error message.

p = x
y The contents of the x and the y (bits 31—16) registers are multiplied, and the result is placed in the
*
p register.

aD = p p = x
y The contents of the p register are copied into the destination accumulator (aD), then the con-
*
tents of the x and the y (bits 31—16) registers are multiplied, and the result is placed in the p register. The bit
alignment between p and aD is a function of the ALIGN field of the auc register.

aD = aS + p p = x
y The contents of the source accumulator (aS) are added to the contents of the p register,
*
and the result is placed in the destination accumulator (aD). The bit alignment between p and aS is a function of
the ALIGN field of the auc register. The contents of the x and the y (bits 31—16) registers are multiplied, and the
result is placed in the p register.

aD = aS – p p = x
y The contents of the p register are subtracted from the contents of the source accumulator
*
(aS), and the result is placed in the destination accumulator (aD). The bit alignment between p and aS is a func-
tion of the ALIGN field of the auc register. The contents of the x and the y (bits 31—16) registers are multiplied,
and the result is placed in the p register.

aD = p The contents of the p register are copied into the destination accumulator (aD). The bit alignment
between p and aD is a function of the ALIGN field of the auc register.

aD = aS + p The contents of the source accumulator (aS) are added to the contents of the p register, and the
result is placed in the destination accumulator (aD). The bit alignment between p and aS is a function of the
ALIGN field of the auc register.

aD = aS – p The contents of the p register are subtracted from the contents of the source accumulator (aS), and
the result is placed in the destination accumulator (aD). The bit alignment between p and aS is a function of the
ALIGN field of the auc register.

aD = y The contents of the y register are copied into the destination accumulator (aD).
Lucent Technologies Inc.
DSP1611/17/18/27/28/29 DIGITAL SIGNAL PROCESSOR
(continued)
Long immediate data move.
Data move from an accumulator [low word].
Multiply/ALU transfer from Y memory. M = 0, 1, 2, or 3.
In these, x is loaded with the same data as y but a dummy x access is also
made. The use of these instructions for squaring is not recommended
Data move with compound addressing.
DRAFT COPY
Instruction Set
†
.
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