Test References - Keysight U7233A Testing Notes

Ddr1 compliance test application
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3
Single-Ended Signals AC Input Parameters Tests
FallingSlew
11 Compare test results against the compliance test limit.

Test References

See Table 13 - Input Slew Rate for DQ, DQS, and DM, in the JEDEC Standard JESD79E.
40
V
V
max
(
)
REF
=
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
IL ac
ΔTF
DDR1 Compliance Testing Methods of Implementation

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U7233b

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