Tdqsh, Dqs Input High Pulse Width - Test Method Of Implementation; Signals Of Interest; Test Definition Notes From The Specification; Pass Condition - Keysight U7233A Testing Notes

7 Data Strobe Timing (DST) Tests

tDQSH, DQS Input High Pulse Width - Test Method of Implementation

The purpose of this test is to verify that the width of the high level of the data strobe signal is within
the conformance limit as specified in the JEDEC Standard JESD79E.

Signals of Interest

Based on the test definition (Read cycle only):
•
Signals required to perform the test on the oscilloscope:
•
•
•
Optional signal required to separate the signals for the different Ranks:
•

Test Definition Notes from the Specification

Table 40 Electrical Characteristics and AC Timing
AC Characteristics Parameter
DQS input high pulse width
AC Characteristics Parameter
DQS input high pulse width

PASS Condition

The measured pwidth of the data strobe signal should be within specification limit.

Measurement Algorithm

1
2
3
4
5
6
7
100
Data Strobe Signal (DQS as Pin Under Test Signal)
Data Strobe Signal (DQS as Pin Under Test Signal)
Data Signal (DQ as Supporting Signal)
Clock Signal (CK as Reference Signal)
Chip Select Signal (CS as additional signal, which requires additional channel)
Obtain the parameters and settings from the Configuration page.
Pre-condition the scope settings. Verify the actual DUT speed against the user speed selection at
the Setup page.
Chip Select (CS) option is only applicable if the user has selected "Yes" for the Verify Selected
Rank Only option in the Configuration page. It uses the CS-DQS for signal separation. Else, by
default, the DQS-DQ is used for signal separation.
Use the InfiniiScan feature with the Setup time and Hold time to find and capture the Read cycle.
If you have selected the CS option, skip the next step and go to step 7.
Search for the DQS preamble towards the left from the point where the Read cycle was previously
captured. The for loops, TEdge and Delta Time are used to search the preamble.
Once the preamble is located, call the "BinaryEdgeNormal" function to obtain the Edge number.
This Edge number will be used to locate the point of interest on the specific signal.
Symbol DDR 333
Min Max Min
tDQSH 0.35 0.35
Symbol DDR 400A
(2.5-3-3)
Min Max Min
tDQSH 0.35 0.35
DDR1 Compliance Testing Methods of Implementation
DDR 266 DDR 200
Max Min Max
0.35
DDR 400B DDR 400C
(3-3-3) (3-4-4)
Max Min Max
0.35
Units Notes
tCK
Units Notes
tCK