Keysight U7233A Testing Notes page 56

Ddr1 compliance test application
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4
Single-Ended Signals AC Output Parameters Tests
Table 17
Test Configuration Options
Configuration Option
Stop on error
Signal Threshold setting by percentage
VDD
VDDQ
Vref
Vih(DC)
Vih(AC)
Vil(DC)
Vil(AC)
InfiniiScan Limits
Read Cycle
IScan_UL_READ
IScan_LL_READ
Write Cycle
IScan_UL_WRITE
IScan_LL_WRITE
Single-Ended Signals
Single-Ended AC Parameters
Pin Under Test, PUT
PUT Source
Supporting Pin
Supporting Pin Source
56
Description
Enabling this option will allow error messages to prompt whenever the test criteria is not met. Disabling
this option will allow the system to bypass all the error messages that could occur and proceed to the next
test. This option is suitable for long hours multiple trials.
This option allows you to define the Upper and Lower threshold of the signal by percentage.
Input supply voltage value.
Input supply voltage for data output.
Input reference voltage value.
Input voltage high value (direct current).
Input voltage high value (alternating current).
Input voltage low value (direct current).
Input voltage low value (alternating current).
Identifies the upper limit for Setup Time measurement used in the InfiniiScan Measurement Mode (READ
cycle)
Identifies the lower limit for Setup Time measurement used in the InfiniiScan Measurement Mode (READ
cycle)
Identifies the upper limit for Setup Time measurement used in the InfiniiScan Measurement Mode (WRITE
cycle)
Identifies the lower limit for Setup Time measurement used in the InfiniiScan Measurement Mode (WRITE
cycle)
Identifies the Pin Under Test for Single-Ended AC parameters.
Identifies the source of the PUT to be analyzed for Single-Ended AC tests.
Identifies the required supporting pin for Single-Ended AC parameters.
Identifies the source of the supporting pin for Single-Ended AC Tests.
DDR1 Compliance Testing Methods of Implementation

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