Keysight U7233A Testing Notes page 74

6 Differential Signals AC Input Parameters Tests
9
Table 27
Configuration Option
Stop on error
Signal Threshold setting by
percentage
VDD
VDDQ
Vref
Vih(DC)
Vih(AC)
Vil(DC)
Vil(AC)
InfiniiScan Limits
Read Cycle
IScan_UL_READ
IScan_LL_READ
Write Cycle
IScan_UL_WRITE
IScan_LL_WRITE
Differential Tests
Pin Under Test, PUT
PUT (+) Source
PUT (-) Source
Supporting Pin
Supporting Pin Source
74
Follow the DDR1 Test Application's task flow to set up the configuration options (see
run the tests and view the tests results.
Test Configuration Options
Description
Enabling this error message will allow error message to prompt whenever criteria is not met.
Disabling this option will allow the system to bypass all the error messages that could occur
and continue to the next test. This option is suitable for long hours multiple trial.
This option allow user to define the Upper and Lower threshold of the signal by percentage.
Input supply voltage value.
Input supply voltage for data output.
Input reference voltage value.
Input voltage high value (direct current).
Input voltage high value (alternating current).
Input voltage low value (direct current).
Input voltage low value (alternating current).
Identifies the upper limit for Setup Time measurement used in the InfiniiScan Measurement
Mode (READ cycle)
Identifies the lower limit for Setup Time measurement used in the InfiniiScan Measurement
Mode (READ cycle)
Identifies the upper limit for Setup Time measurement used in the InfiniiScan Measurement
Mode (WRITE cycle)
Identifies the upper limit for Setup Time measurement used in the InfiniiScan Measurement
Mode (WRITE cycle)
Identifies the Pin Under Test for Differential AC parameters.
Identifies the source of the PUT(+) for Differential AC tests.
Identifies the source of the PUT(-) for Differential AC tests.
Identifies the required supporting pin for Differential AC parameters.
Identifies the source of the supporting pin for Differential AC tests.
DDR1 Compliance Testing Methods of Implementation
Table 27),