Keysight U7233B DDR1 Compliance Test Manuals

Manuals and User Guides for Keysight U7233B DDR1 Compliance Test. We have 1 Keysight U7233B DDR1 Compliance Test manual available for free PDF download: Testing Notes

Keysight U7233B Testing Notes (196 pages)

DDR1 Compliance Test Application

Brand: Keysight | Category: Analytical Instruments | Size: 5 MB

Quick Reference
3
DDR1 Compliance Test Application - at a Glance
5
Required Equipment and Software
6
In this Book
7
See also
8
Contact Keysight
9
Phone or Fax
9
Table of Contents
11
1 Installing the DDR1 Compliance Test Application

21
- Installing the Software
  
  22
- Installing the License Key
  
  23
2 Preparing to Take Measurements

25
- Calibrating the Oscilloscope
  
  26
- Starting the DDR1 Compliance Test Application
  
  27
  - Online Help Topics
    29
3 Single-Ended Signals AC Input Parameters Tests

31
- Probing for Single-Ended Signals AC Input Parameters Tests
  
  32
  - Test Procedure
    32
- Slewr Test Method of Implementation
  
  35
  - Signals of Interest
    36
  - Test Definition Notes from the Specification
    36
  - PASS Condition
    36
  - Measurement Algorithm
    36
  - Test References
    37
- Slewf Test Method of Implementation
  
  38
  - Signals of Interest
    39
  - Test Definition Notes from the Specification
    39
  - PASS Conditionpass Condition
    39
  - Measurement Algorithm
    39
  - Test References
    40
- VIH(AC) Test Method of Implementation
  
  41
  - Signals of Interest
    41
  - Test Definition Notes from the Specification
    42
  - PASS Condition
    42
  - Measurement Algorithm
    42
  - Test References
    43
- VIH(DC) Test Method of Implementation
  
  44
  - Signals of Interest
    44
  - Test Definition Notes from the Specification
    45
  - PASS Condition
    45
  - Measurement Algorithm
    45
  - Test References
    46
- VIL(AC) Test Method of Implementation
  
  47
  - Signals of Interest
    47
  - Test Definition Notes from the Specification
    48
  - PASS Condition
    48
  - Measurement Algorithm
    48
  - Test References
    49
- VIL(DC) Test Method of Implementation
  
  50
  - Signals of Interest
    50
  - Test Definition Notes from the Specification
    51
  - PASS Condition
    51
  - Measurement Algorithm
    51
  - Test References
    51
4 Single-Ended Signals AC Output Parameters Tests

54
- Probing for Single-Ended Signals AC Output Parameters Tests
  
  54
  - Test Procedure
    54
- VOH(AC) Test Method of Implementation
  
  57
  - Signals of Interest
    57
  - Test Definition Notes from the Specification
    58
  - PASS Condition
    58
  - Measurement Algorithm
    58
  - Test References
    58
- VOL(AC) Test Method of Implementation
  
  59
  - Signals of Interest
    59
  - Test Definition Notes from the Specification
    60
  - PASS Condition
    60
  - Measurement Algorithm
    60
  - Test References
    60
5 Single-Ended Signals Overshoot/Undershoot Tests

61
- Probing for Overshoot/Undershoot Tests
  
  62
  - Test Procedure
    62
- AC Overshoot Test Method of Implementation
  
  65
  - Signals of Interest
    65
  - Test Definition Notes from the Specification
    66
  - PASS Condition
    66
  - Measurement Algorithm
    66
  - Test References
    67
- AC Undershoot Test Method of Implementation
  
  68
  - Signals of Interest
    68
  - Test Definition Notes from the Specification
    69
  - PASS Condition
    69
  - Measurement Algorithm
    69
  - Test References
    70
6 Differential Signals AC Input Parameters Tests

72
7 Data Strobe Timing (DST) Tests

81
- Probing for Data Strobe Timing Tests
  
  82
  - Test Procedure
    82
- Thz(Dq), DQ High Impedance Time from CK/CK# - Test Method of Implementation
  
  85
  - Signals of Interest
    85
  - Test Definition Notes from the Specification
    85
  - PASS Condition
    86
  - Measurement Algorithm
    86
  - Test References
    86
- Thz(Dqs), DQS High Impedance Time from CK/CK# - Test Method of Implementation
  
  87
  - Signals of Interest
    87
  - Test Definition Notes from the Specification
    87
  - PASS Condition
    88
  - Measurement Algorithm
    88
  - Test References
    88
- Tlz(Dqs), DQS Low-Impedance Time from CK/CK# - Test Method of Implementation
  
  89
  - Signals of Interest
    89
  - Test Definition Notes from the Specification
    89
  - PASS Condition
    90
  - Measurement Algorithm
    90
  - Test References
    90
- Tlz(Dq), DQ Low-Impedance Time from CK/CK# - Test Method of Implementation
  
  91
  - Signals of Interest
    91
  - Test Definition Notes from the Specification
    92
  - PASS Condition
    92
  - Measurement Algorithm
    92
  - Test References
    93
- Implementation
  
  94
- Tqh, DQ/DQS Output Hold Time from DQS - Test Method of Implementation
  
  96
  - Signals of Interest
    96
  - Test Definition Notes from the Specification
    96
  - PASS Condition
    96
  - Measurement Algorithm
    96
  - Test References
    97
- Tdqss, DQS Latching Transition to Associated Clock Edge - Test Method of Implementation
  
  98
  - Signals of Interest
    98
  - Test Definition Notes from the Specification
    98
  - PASS Condition
    98
  - Measurement Algorithm
    98
  - Test References
    99
- Tdqsh, DQS Input High Pulse Width - Test Method of Implementation
  
  100
  - Signals of Interest
    100
  - Test Definition Notes from the Specification
    100
  - PASS Condition
    100
  - Measurement Algorithm
    100
  - Test References
    101
- Tdqsl, DQS Input Low Pulse Width - Test Method of Implementation
  
  102
  - Signals of Interest
    102
  - Test Definition Notes from the Specification
    102
  - PASS Condition
    102
  - Measurement Algorithm
    102
  - Test References
    103
- Tdss, DQS Falling Edge to CK Setup Time - Test Method of Implementation
  
  104
  - Signals of Interest
    104
  - Test Definition Notes from the Specification
    104
  - PASS Condition
    104
  - Measurement Algorithm
    104
  - Test References
    105
- Tdsh, DQS Falling Edge Hold Time from CK - Test Method of Implementation
  
  106
  - Signals of Interest
    106
  - Test Definition Notes from the Specification
    106
  - PASS Condition
    106
  - Measurement Algorithm
    106
  - Test References
    107
- Twpst, Write Postamble - Test Method of Implementation
  
  108
  - Signals of Interest
    108
  - Test Definition Notes from the Specification
    108
  - PASS Condition
    108
  - Measurement Algorithm
    108
  - Test References
    109
- Twpre, Write Preamble - Test Method of Implementation
  
  110
  - Signals of Interest
    110
  - Test Definition Notes from the Specification
    110
  - PASS Condition
    111
  - Measurement Algorithm
    111
  - Test References
    111
- Trpre, Read Preamble - Test Method of Implementation
  
  112
  - Signals of Interest
    112
  - Test Definition Notes from the Specification
    112
  - PASS Condition
    112
  - Measurement Algorithm
    113
  - Test References
    113
- Trpst, Read Postamble - Test Method of Implementation
  
  114
8 Clock Timing (CT) Tests

117
- Probing for Clock Timing Tests
  
  118
  - Test Procedure
    118
- Tac, DQ Output Access Time from CK/CK# - Test Method of Implementation
  
  121
  - Signals of Interest
    121
  - Test Definition Notes from the Specification
    121
  - Pass Condition
    122
  - Measurement Algorithm
    122
  - Test References
    123
- Tdqsck, DQS Output Access Time from CK/CK #- Test Method of Implementation
  
  124
  - Signals of Interest
    125
  - Test Definition Notes from the Specification
    126
  - PASS Condition
    126
  - Measurement Algorithm
    126
  - Test References
    127
- Average Clock Period - Tck(Avg) - Test Method of Implementation
  
  128
  - Signals of Interest
    128
  - Test Definition Notes from the Specification
    128
  - PASS Condition
    128
  - Measurement Algorithm
    129
  - Test References
    129
- Average High Pulse Wid Th - Tch(Avg) - Test Method of Implementation
  
  130
  - Average High Pulse Width - Tch(Avg) - Test Method of Implementation
    130
  - Measurement Algorithm
    130
  - Pass Condition
    130
  - Signals of Interest
    130
  - Test Definition Notes from the Specification
    130
  - Test References
    130
  - Average Low Pulse Wid Th - Tcl(Avg) - Test Method of Implementation
    131
    
    Average Low Pulse Width - Tcl(Avg) - Test Method of Implementation
    131
    
    Measurement Algorithm
    131
    
    Pass Condition
    131
    
    Signals of Interest
    131
    
    Test Definition Notes from the Specification
    131
    
    Test References
    131
  - Probing for Data Mask Timing Tests
    134
    
    Test Procedure
    134
  - Tds(Base), DQ and DM Input Setup Time - Test Method of Implementation
    137
    
    Signals of Interest
    137
    
    Test Definition Notes from the Specification
    137
    
    PASS Condition
    137
    
    Measurement Algorithm
    138
    
    Test References
    138
  - Tdh(Base), DQ and DM Input Hold Time - Test Method of Implementation
    139
    
    Signals of Interest
    139
    
    Test Definition Notes from the Specification
    139
    
    PASS Condition
    140
    
    Measurement Algorithm
    140
    
    Test References
    140
10 Command and Address Timing (CAT) Tests

141
- Probing for Command and Address Timing Tests
  142
  - Test Procedure
    143
  - Tis(Base) - Address and Control Input Setup Time - Test Method of Implementation
    145
    
    Signals of Interest
    145
    
    Test Definition Notes from the Specification
    145
    
    PASS Condition
    145
    
    Measurement Algorithm
    146
    
    Test References
    146
  - Tih(Base) - Address and Control Input Hold Time - Test Method of Implementation
    147
    
    Signals of Interest
    147
    
    Test Definition Notes from the Specification
    147
    
    PASS Condition
    147
    
    Measurement Algorithm
    148
    
    Test References
    148
11 Advanced Debug Mode Clock Tests

150
- Probing for Clock Tests
  150
12 Advanced Debug Mode High-Low State Ringing Tests

159
- Probing for Advanced Debug Mode High-Low State Ringing Tests
  160
  - Test Procedure
    160
  - High State Ringing Tests Method of Implementation
    164
    
    Signals of Interest
    164
    
    Measurement Algorithm
    165
  - Low State Ringing Tests Method of Implementation
    166
    
    Signals of Interest
    166
    
    Measurement Algorithm
    167
13 Calibrating the Infiniium Oscilloscope and Probe

169
- Required Equipment for Oscilloscope Calibration
  170
- Internal Calibration
  171
- Required Equipment for Probe Calibration
  174
- Probe Calibration
  175
Required Triggering Condition Not Met

188
Software License Error

190
Frequency out of Range Error

191
Missing Signal Error

192
Invalid Pre/Postamble Signal Error

193

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Keysight U7233B DDR1 Compliance Test Manuals

Keysight U7233B Testing Notes (196 pages)

Table of Contents

1 Installing the DDR1 Compliance Test Application

Installing the Software

Installing the License Key

2 Preparing to Take Measurements

Calibrating the Oscilloscope

Starting the DDR1 Compliance Test Application

3 Single-Ended Signals AC Input Parameters Tests

Probing for Single-Ended Signals AC Input Parameters Tests

Slewr Test Method of Implementation

Slewf Test Method of Implementation

VIH(AC) Test Method of Implementation

VIH(DC) Test Method of Implementation

VIL(AC) Test Method of Implementation

VIL(DC) Test Method of Implementation

4 Single-Ended Signals AC Output Parameters Tests

Probing for Single-Ended Signals AC Output Parameters Tests

VOH(AC) Test Method of Implementation

VOL(AC) Test Method of Implementation

5 Single-Ended Signals Overshoot/Undershoot Tests

Probing for Overshoot/Undershoot Tests

AC Overshoot Test Method of Implementation

AC Undershoot Test Method of Implementation

6 Differential Signals AC Input Parameters Tests

Probing for Differential Signals AC Input Parameters Tests

VID(AC), AC Differential Input Vol Tage - Test Method of Implementation

VIX(AC), AC Differential Input Cross Point Vol Tage -Test Method of Implementation

7 Data Strobe Timing (DST) Tests

Probing for Data Strobe Timing Tests

Thz(Dq), DQ High Impedance Time from CK/CK# - Test Method of Implementation

Thz(Dqs), DQS High Impedance Time from CK/CK# - Test Method of Implementation

Tlz(Dqs), DQS Low-Impedance Time from CK/CK# - Test Method of Implementation

Tlz(Dq), DQ Low-Impedance Time from CK/CK# - Test Method of Implementation

Implementation

Tqh, DQ/DQS Output Hold Time from DQS - Test Method of Implementation

Tdqss, DQS Latching Transition to Associated Clock Edge - Test Method of Implementation

Tdqsh, DQS Input High Pulse Width - Test Method of Implementation

Tdqsl, DQS Input Low Pulse Width - Test Method of Implementation

Tdss, DQS Falling Edge to CK Setup Time - Test Method of Implementation

Tdsh, DQS Falling Edge Hold Time from CK - Test Method of Implementation

Twpst, Write Postamble - Test Method of Implementation

Twpre, Write Preamble - Test Method of Implementation

Trpre, Read Preamble - Test Method of Implementation

Trpst, Read Postamble - Test Method of Implementation

8 Clock Timing (CT) Tests

Probing for Clock Timing Tests

Tac, DQ Output Access Time from CK/CK# - Test Method of Implementation

Tdqsck, DQS Output Access Time from CK/CK #- Test Method of Implementation

Average Clock Period - Tck(Avg) - Test Method of Implementation

Average High Pulse Wid Th - Tch(Avg) - Test Method of Implementation

10 Command and Address Timing (CAT) Tests

11 Advanced Debug Mode Clock Tests

12 Advanced Debug Mode High-Low State Ringing Tests

13 Calibrating the Infiniium Oscilloscope and Probe

Required Triggering Condition Not Met

Software License Error

Frequency out of Range Error

Missing Signal Error

Invalid Pre/Postamble Signal Error

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