Measurement Algorithm; Test References - Keysight U7233A Testing Notes

Ddr1 compliance test application
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Measurement Algorithm

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10 Define the histogram window in order to obtain the Min and Max voltage for the DQS preamble
11 Once all the points are obtained, proceed with the trigonometry calculation to find the point
12 Assign marker A for the DQS signal crossing point while marker B for the data strobe signal start
13 Measure delta of marker A and marker B and this will be the test result.
14 Compare the test result against the compliance test limit.

Test References

See Table 11 - Electrical Characteristics and AC Timing, in the JEDEC Standard JESD79E.
DDR1 Compliance Testing Methods of Implementation
Obtain the parameters and settings from the Configuration page.
Pre-condition the scope settings. Verify the actual DUT speed against the user speed selection at
the Setup page.
Perform signal checking on all the signals in-use in the measurement to ensure that it can be
triggered during the test. This includes Vp-p, Vmin, Vmax and Vmid of each signal.
Perform signal skew checking on the DQ-DQS to ensure that it can be triggered during the
Read/Write separation later.
Chip Select (CS) option is only applicable if the user has selected "Yes" for the Verify Selected
Rank Only option in the Configuration page. It uses the CS-DQS for signal separation. Else, by
default, the DQS-DQ is used for signal separation.
Use the InfiniiScan feature with the Setup time and Hold time to find and capture the Read cycle.
If you have selected the CS option, skip the next step and go to step 9.
Search for the DQS preamble towards the left from the point where the Read cycle was previously
captured. The For loops, TEdge and Delta Time are used to search the preamble.
Once the preamble is located, call the "BinarySearchNormal" function to locate the first DQS
crossing point or the reference point.
signal and it will be used for the threshold setup for the trigonometry calculation later.
where the DQS starts to transit from tristate to the time when it start to drive low (for instance,
beginning of preamble).
to drive low.
Data Strobe Timing (DST) Tests
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