Signals Of Interest; Test Definition Notes From The Specification; Pass Conditionpass Condition; Measurement Algorithm - Keysight U7233A Testing Notes

Ddr1 compliance test application
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Signals of Interest

Based on the test definition (Write cycle only):
Signals required to perform the test on the oscilloscope:
* Pin Under Test signal can be either one of the signals under the test definition.

Test Definition Notes from the Specification

Table 4
Input Slew Rate for DQ, DQS, and DM
AC Characteristics - Parameter
DQ/DM/DQS input slew rate measured
between VIH(DC), VIL(DC) and VIL(DC),
VIH(DC)
NOTE a and m: Please refer to the JEDEC Standard JESD79E.

PASS ConditionPASS Condition

The calculated Rising Slew value for the test signal should be greater than or equal to the SLEW
value.

Measurement Algorithm

1
2
3
4
5
6
7
8
9
10 Calculate the Falling Slew.
DDR1 Compliance Testing Methods of Implementation
Data Signal
Data Strobe Signal OR
Address Signal OR
Control Signal OR
Data Mask Control Signals
Data Signal (DQ as Pin Under Test Signal)*
Data Strobe Signal (DQS as Supporting Signal)
Clock Signal - CK is required to perform pre-test to verify the DUT speed against user's speed
grade selection
Symbol
DDR 400
Min
DCSlew
0.5
SLEW
F
Calculate the initial time scale value based on the selected DDR1 speed grade options.
Pre-condition the scope settings. Verify the actual DUT speed against the user speed selection at
the Setup page.
Calculate the number of sampling points according to the time scale value.
Obtain sample or acquire signal data and perform signal conditioning to maximize the screen
resolution (vertical scale adjustment).
Perform signal checking on all the signals in-use in the measurement to ensure that it can be
triggered during the test. This includes Vp-p, Vmin, Vmax and Vmid of each signal.
Perform signal skew checking on DQ-DQS to make sure it can be triggered during Read/Write
separation later.
Setup the required scope settings and histogram function settings.
Verify that V
and V
REF
IL(AC)
Calculate the delta TR.
Single-Ended Signals AC Input Parameters Tests
DDR 333
Max
Min
Max
Min
4.0
0.5
4.0
0.5
points can be found on the oscilloscope screen.
DDR 266
DDR 200
Max
Min
Max
4.0
0.5
4.0
3
Units
Notes
V/ns
a, m
39

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