Test References - Keysight U7233A Testing Notes

Ddr1 compliance test application
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8
9
10 Measure delta of marker A and marker B and this will be the test result.
11 Compare the test result against the compliance test limit.

Test References

See Table 11 - Electrical Characteristics and AC Timing, in the JEDEC Standard JESD79E.
DDR1 Compliance Testing Methods of Implementation
After obtaining the Edge number for the respective signal, begin the tDQSH measurement by
using the Pwidth function to find any rising edge of the data strobe signal and measure the
pwidth for every single bit in the captured data burst.
Assign marker A for the rising edge of the clock signal while marker B for the falling edge of the
clock signal.
Data Strobe Timing (DST) Tests
7
101

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